In U.S. Pat. No. 4,717,912, Harvey et al. describe output structures for an integrated circuit package which are able to provide any combination of stored and nonstored, inverted and noninverted, logic signals to a plurality of pins. In one embodiment, each output structure includes a storage register having an input connected to a logic circuit for receiving a logic signal. A conductive line is also connected to the same input. The conductive line carrying the unstored logic signal, and the output of the storage register carrying the stored logic signal connect to inputs of a first multiplexer, which is responsive to a control signal from a programmable selection bit to select one of the two signals for its output. The multiplexer output is connected to an input of an XOR gate, whose other input receives a control signal from another programmable selection bit to cause the XOR gate to either invert or not invert the selected stored or nonstored signal. The XOR gate output connects to a pin of the IC package. The XOR gate can be enabled or disabled by another control signal. Either an inverted version of the stored signal from the storage register or the signal applied to the pin (possibly an external signal) is selected by another multiplexer and fed back to the logic circuit.
In U.S. Pat. No. 4,896,296, Turner et al. describe a configurable input/output cell for a programmable logic device having an output driver which is enabled or disabled by a control signal obtained through a multiplexer. One input to the multiplexer is a logic high signal V.sub.cc for which the output driver is always enabled, another input is a logic low signal or ground for which the output driver is always disabled, a third input is an output enable signal OE common to all of the input/output cells, and a fourth input is a product term signal providing an individual output enable signal. The multiplexer selects which one of the signals on the four inputs controls the output driver. Another feature of Turner et al.'s input/output cell is a feedback multiplexer which selects either the stored output Q of the cell's register, or one of two signals applied to the device terminals or pins associated either with that cell or with an adjacent cell, or a fixed ground signal for feedback to the logic array.
In U.S. Pat. No. 4,771,285, Agrawal et al. describe a programmable logic cell having an input select multiplexer that selects either a combinatorial logic signal or an external pin signal for input into and storage by a register or latch. The logic cell also has a feedback multiplexer selecting either the combinatorial logic signal or the output of the register for feedback to the logic circuit. An output enable multiplexer selects either a logic high signal V.sub.cc, a ground signal, a signal from a pin or a sum or product term logic signal from the logic circuit for enabling or disabling the output driver.
In U.S. Pat. No. 4,742,252, Agrawal describes an integrated circuit having two or more programmable arrays. Each array receives a plurality of inputs supplied plied through an input multiplexor and generates a plurality of output terms. Each input multiplexer is coupled to and selects from a set of input signals received from input pins for both arrays and a subset of the plurality of output terms fed back from each array to both multiplexers. The device can thus be configured so that the two arrays operate in series, in parallel or some combination of series and parallel operation.
In U.S. Pat. No. 5,046,035, Jigour et al. describe a programmable logic device that includes a plurality of macrocells, which have a register that can be configured as either a D, T or JK flip-flop. The register receives two logic signal inputs A and B from the OR array of the device and provides an output Q to output and feedback multiplexers. One of the signal inputs B is ignored by the register in the D and T flip-flop configurations.
While many improvements in the functional flexibility of input/output circuits for programmable logic devices have already been achieved, further improvement is continually sought, so that the user may have as much control over the programming of such devices as possible. It is an object of the invention to provide such additional improvements in the functional flexibility of input/output macrocells.